![]() ![]() The output is given to the D/A converter which produces an analog equivalent of the MSB and is compared with the analog input V in. The MSB of the SAR (Q7) is set as soon as the first transition from LOW to HIGH is introduced. The 8-bit latch at the end of conversation holds onto the resultant digital data output.Īt the start of a conversion cycle, the SAR is reset by making the start signal (S) high. Till the digital output (8 bits) of the SAR is equivalent to the analog input V in, the SAR adjusts itself. ![]() The output of the comparator is a serial data input to the SAR. The analog output V a of the D/A converter is then compared to an analog signal V in by the comparator. The main part of the circuit is the 8-bit SAR, whose output is given to an 8-bit D/A converter. Successive Approximation Type Analog to Digital Converter
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